Si based transistor scaling is now reaching its physical limits, therefore the application of new materials such as July compound materials to replace the Si channel is under great attention due to their high electron transport properties. The III/V compound material system InaGabAs wherein a is from 0.40 to 1.00, b is from 0 to 0.60, and a+b is 1.00, reveals a very high electron mobility. At present the realization of n-multi gate device based on InaGabAs is a main research focus.
However, the large lattice mismatch between Si and InaGabAs requires an integration approach involving the use of a buffer layer between the Si and the InaGabAs which improves crystal quality and reduce defect density in the InaGabAs channel layer. A popular buffer layer is InP. InP may provide that, in addition to match the lattice constant of InaGabAs where a is 0.535 and b is 0.465, it can be selectively etched away from the InaGabAs to enable the realization of a gate contact around an InaGabAs wire. However, InP deposition in mass production requires intensive epitaxy tool maintenance linked with the use of a significant amount of trimethylindium. Furthermore, InP easily forms a triangle (pyramidal) shaped growth surface when deposited in trenches, because the {111} crystal facets are very stable. It is more difficult to integrate a InaGabAs channel on this triangle shaped surface than on a flat {001} surface. An additional CMP-step (chemical mechanical polishing) can solve this issue but leads to a more complex integration flow with an additional re-growth step (see N. Waldron et al., 2014 Symp. VLSI Technol. Dig. Tech. Papers, 32-33). Typical growth conditions for InP, in particular on patterned wafers, are low growth temperatures. This leads to a high carbon incorporation into the InP layer, which causes a high leakage current in a n-FinFET device but also leaves more carbon in the growth chamber which has to be removed during cleaning. It is therefore attractive to consider a better ways to form a lattice constant buffer between Si and InaGabAs maintaining the possibility to subsequently expose the InaGabAs channel in order to form a gate contact around it.
Aside from a buffer, a quantum barrier between the buffer and the InaGabAs is often used. In order to ensure an efficient electron confinement in the InaGabAs channel, a sufficiently high hetero-offset in the conduction band towards a barrier layer may be provided. Additionally the carrier leakage is also clearly reduced by a high conduction band offset between the channel and the barrier material. Therefore the final device performance is clearly improved by good electron confinement in the channel and low leakage current between source/drain and also towards the substrate.
In the class of III/V compound material systems, Al-containing alloys tend to have a relative large band gap. Hence the application of Al-containing barrier layers induces a high hetero-offset toward the channel material with low band gap. In current transistor device concepts based on InaGabAs channels, Al-rich layers such as InAlAs and GaAlInAs are used to achieve a high hetero-offset in the conduction band between the channel and the barrier. However, Al-rich layers have numerous disadvantages. First, Al has a very high affinity to bond with O and N. This leads to numerous problems whether the Al-rich layer is grown by aspect ratio trapping in narrow cavities (STI-first, i.e. Shallow Trench Isolation-first approach) or is grown in wide cavities (STI-last approach).
For instance, Al-rich layers have a high affinity for the masks used in patterning processes, making it difficult to maintain the selective area growth (SAG) conditions without deposition on the mask or complicating the subsequent removal of these parasitic mask deposition. This is leading to a poorly controlled Al-rich layer deposition.
In the STI-first approach, the Al-rich material will form stacking faults and twins when the material comes in contact with the STI mask during SAG It is therefore very difficult to obtain a defect-free selective epitaxial growth (SEG). These planar crystal defects clearly affect the quality of the overgrown InaGabAs channel and degrade all device performance.
In the STI-last approach, the Fin-etch process such as selective etching is very sensitive to material properties of the different layer stacks. In particular an Al-rich layer easily leads to a deformed (pyramidal) fin shape when a GaaInbAs channel is present on top of it.
There is therefore a need for better ways to form a quantum barrier between Si (or a buffer) and InaGabAs, which is Aluminum-poor or Aluminum-free.